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    FPGA design of a fourth order elliptic IIR band-pass filter using LabVIEW
    (DergiPark, 2021) Tatar, Guner; Çiçek, İhsan; Bayar, Salih
    Infinite impulse response filters are often used to meet the demand of modern electrical engineering applications such as image processing, digital signal processing and telecommunications because of the high selectivity and computational efficiency. In missioncritical real-time applications, computational latency is usually intolerable. High-speed processing of data and the coefficients require a digital signal processor or an FPGA instead of a general-purpose microprocessor. In the last two decades, FPGAs have been applied to many fields of signal processing due to parallelism determined scalable performance and run-time reconfigurability. This study presents a LabVIEW driven FPGA hardware design of a fourth-order discrete-time IIR elliptic band-pass filter. The designed filter has 2 kHz low and 2.5 kHz high cut-off frequencies with 1dB pass-band ripple and 80dB stop-band attenuation. The expected behavior of the designed filter has been confirmed by the functional simulation of the developed VHDL model. LabVIEW FPGA resource estimation reports a compact footprint for the proposed design.
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    FPGA design of a high- resolution fır band-pass filter by using labvıew environment
    (Osman Sağdıç, 1 Aralık 2021) Çiçek, İhsan; Bayar, Salih; Tatar, Güner
    Designers regularly use Finite Impulse Response (FIR) filters to fulfil the need for current electronic design applications such as signal or image processing and digital communications because of the remarkable selectivity computational efficiency. Fast and efficient information processing requires a dedicated microprocessor or a digital signal processor that may not always be available or provide enough performance. In such scenarios, designers can configure FPGAs for processing digitized signals. One of the most popular signal processing applications is filtering. Unlike the Infinite Impulse Response (IIR) filters, FIR filters do not have analog equivalent circuits. For this purpose, continuous time-discrete time conversion is not possible with the help of transforms. Because analog filters cannot have a finite impulse response, the design methods of FIR filters can be made as windowing method, pulse response truncation, and optimal filter design method. Considering this information, it aims to digitally separate two signals with different frequencies (2.4 kHz and 4.2 kHz), which are given to the input as analog, to obtain the desired information signal and suppress other signals. We preferred to use LabVIEW graphical programming language to get the digital FIR filter coefficients. We selected rectangular windowing, set the digital filter's sampling frequency as 18720 Hz, and determined the filter's coefficient with high-frequency resolution as 24. Using filter coefficients in the real-time FPGA-VHDL environment, we showed the performance and resource consumption. LabVIEW is used for simulation as well as obtaining filter coefficients. In addition, we compared both simulation and real-time FPGA-VHDL application output waveforms and examined both platforms' advantages and disadvantages.
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    Performance evaluation of lightweight cryptographic algorithms on RISC-V
    (Institute of Electrical and Electronics Engineers Inc., 2022) Mumcu, Muhammet Cihat; Çiçek, İhsan; Bayar, Salih
    The cyber-security of Internet of Things (IoT) devices has emerged as a critical research topic in proportion with their proliferation. Cryptographic algorithms are used to protect the large cyber-attack surfaces created by IoT devices. In addition to their industrial environment utilization, we also use them widely in our daily lives for providing services such as data confidentiality, integrity and authentication. Due to limited computational capacity, it is inefficient to use traditional cryptographic algorithms in cost-sensitive and low-power IoT devices. Researchers have developed many lightweight cryptographic algorithms for IoT devices to overcome this problem. Knowing the performance of lightweight cryptographic algorithms on the IoT device's processor ahead, offers key advantages such as optimized cost for the design and shorter time-to-market. In this work, we comparatively studied the performance of various symmetric key lightweight cryptographic algorithms in terms of basic systems parameters such as speed, memory (RAM) space, and flash (ROM) footprint on the RISC-V synthesizable processor architecture suitable for use in IoT applications.